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CompuLab Ltd. FACE Modules – HW Specifications Page 42 of 63
7.4 Hardware Specifications
7.4.1 Mini PCI Express Slot
Table 9 – mini PCI Express edge connector pinout
mini PCI Express edge connector
Pin #
Pin Name
Signal Description
Pin #
Pin Name
Signal Description
1
WAKE#
Open drain, active low signal driven low by a
mini PCIe card to reactivate the PCIe link
2
3.3Vaux
3.3V power rail
3
COEX1/Reserved
Reserved for future wireless coexistence
control interface between radios (if needed)
4
GND
Ground connection
5
COEX2/Reserved
6
1.5V
1.5V power rail
7
CLKREQ#
Clock request - open drain, active low driven
by mini PCIe card to request PCIe reference
clock
8
UIM_PWR/Reserved
The UIM signals are defined on the system
connector to provide the interface between
the removable User Identity Module (UIM)
Interface - an extension of SIM and WWAN.
9
GND
Ground connection
10
UIM_DATA/Reserved
11
REFCLK-
Reference clock used to assist the
synchronization of PCI Express interface
timing circuits
12
UIM_CLK/Reserved
13
REFCLK+
14
UIM_RESET/Reserved
15
GND
Ground connection
16
UIM_VPP/Reserved
Mechanical Notch Key
17
Reserved/UIM_C8
Reserved
18
GND
Ground connection
19
Reserved/UIM_C4
Reserved
20
W_DISABLE#
Active low signal when asserted by the
system disable radio operation. Reserved for
future use.
21
GND
Ground connection
22
PERST#
Asserted when power is switched off and also
can be used by the system to force HW reset
23
PERn0
PCI Express differential receive pair
24
3.3Vaux
3.3V power rail
25
PERp0
26
GND
Ground connection
27
GND
Ground connection
28
1.5V
1.5V power rail
29
GND
Ground connection
30
SMB_CLK
Optional SMBus two-wire interface for
Host/mini PCIe module communication
31
PETn0
PCI Express differential transmit pair
32
SMB_DATA
33
PETp0
34
GND
Ground connection
35
GND
Ground connection
36
USB_D-
USB Host Interface
37
GND
Ground connection
38
USB_D+
39
3.3Vaux
3.3V power rail
40
GND
Ground connection
41
3.3Vaux
3.3V power rail
42
LED_WWAN#
Active low output signals are provided to
allow status indications to users via system
provided LEDs
43
GND
Ground connection
44
LED_WLAN#
45
Reserved
Reserved for future second PCI Express Lane
46
LED_WPAN#
47
Reserved
48
1.5V
1.5V power rail
49
Reserved
50
GND
Ground connection
51
Reserved
52
3.3Vaux
3.3V power rail
- FACE Modules 1
- Legal Notice 2
- Revision History 3
- Table of Contents 4
- Table of Figures 8
- Table of Tables 8
- 1 Overview 10
- 1.3 FACE Module Interface 11
- 1.3.1 Connectors Specs 11
- 1.3.2 Connectors Pinout 12
- EXT-2 connector HOST side 14
- 1.4 Layout 16
- 2.3 Block Diagram 18
- 2.1 Description 18
- 2.2 Highlights 18
- 2.4 Mechanics 19
- 2.4.1 PCB Assembly 19
- 2.4.2 Front Panel 19
- 3.1 Description 20
- 3.2 Highlights 20
- 3.3 Block Diagram 20
- 3.4 Hardware Specifications 21
- 3.4.1 mSATA slot 21
- 3.5 Mechanics 22
- 3.5.1 PCB Assembly 22
- 3.5.2 Front Panel 22
- 3.6 Software Drivers 23
- 4.1 Description 24
- 4.2 Highlights 24
- 4.3 Block Diagram 25
- 4.4 Hardware Specifications 26
- 4.4.5 RJ-11 Serial Ports 28
- 4.4.6 RJ-45 CAN Bus Pinout 28
- 4.5 Configuration 29
- 4.5.2 CAN Bus power supply 29
- 4.6 Mechanics 30
- 4.6.1 PCB Assembly 30
- 4.6.2 Front Panel 30
- 4.7 Software Drivers 31
- 5.1 Description 32
- 5.2 Highlights 32
- 5.3 Block Diagram 32
- 5.4 Hardware Specifications 33
- 5.5 Mechanics 34
- 5.5.1 PCB Assembly 34
- 5.5.2 Front Panel 34
- 5.6 Software Drivers 35
- / FACE Module interface 36
- 6.4 Hardware Specifications 37
- 6.4.3 SPI NOR Flash 38
- 6.5 Mechanics 39
- 6.5.1 PCB Assembly 39
- 6.5.2 Front Panel 39
- 6.6 Software Drivers 40
- 7.4 Hardware Specifications 42
- 7.4.1 Mini PCI Express Slot 42
- 7.5 Mechanics 43
- 7.5.1 PCB Assembly 43
- 7.5.2 Front Panel 43
- 8.1 Description 44
- 8.2 Highlights 44
- 8.3 Block Diagram 45
- 8.4 Hardware Specifications 46
- 8.4.7 RJ11 Connector Pinout 50
- 8.5 Cables 51
- 8.5.2 RJ11 to DB9 Cable 52
- 8.6 Mechanics 53
- 8.6.1 PCB Assembly 53
- 8.6.2 Front Panel 54
- 8.7 Software Drivers 55
- PI6C20400 56
- 1:4 Clock Driver 56
- CML differential 56
- PSE High Voltage 56
- 10.3.4 SPI NOR Flash 59
- Table 13 – PoE RJ45 pinout 60
- 10.4 Mechanics 61
- 10.4.1 PCB Assembly 61
- 10.4.2 Front Panel 61
- 10.5 Software Drivers 62
- 10.6 Safety Information 62
- 11 Reference 63
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